Light-to-light readout system of the CMS electromagnetic calorimeter

For the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC) at CERN, an 80,000-crystal electromagnetic calorimeter will measure electron and photon energies with high precision over a dynamic range of roughly 16 bits. The readout electronics will be located directly behind the crystals, and must survive a total dose of up to 2×104 Gy along with 5×1013 n/cm 2. A readout chain consisting of a custom wide-range acquisition circuit, commercial ADC and custom optical link for each crystal is presently under construction. An overview of the design is presented, with emphasis on the large-scale fiber communication syste

XPAD: pixel detector for material sciences

Currently available 2D detectors do not make full use of the high flux and high brilliance of third generation synchrotron sources. The XPAD prototype, using active pixels, has been developed to fulfil the needs of materials science scattering experiments. At the time, its prototype is build of eight modules of eight chips. The threshold calibration of /spl ap/4 10/sup 4/ pixels is discussed. Applications to powder diffraction or SAXS experiments prove that it allows to record high quality data

Atlaspix3: A high voltage CMOS sensor chip designed for ATLAS Inner Tracker

ATLASpix3 is a 2 x 2 cm$^{2}$ high voltage CMOS sensor chip designed to meet the specifications of outer layers of ATLAS inner tracker. It is compatible with the hybrid pixel sensor ASIC RD53A in terms of electronic interface and geometry. ATLASpix3 is a depleted monolithic CMOS pixel detector which allows the construction of quad modules of the same size as that of hybrid sensors. The readout scheme can be externally configured as triggered or triggerless column drain readout. The hit information is transmitted through a 1.28 Gbit/s serial link. The interface is based on a single command input that is used for providing clock, trigger and configuration commands. This contribution summarizes the detector architecture with focus on the design of its readout circuitry. In addition, simulation results obtained using ReadOut Modelling Environment (ROME), that led to the design of the readout system are discussed

3D electronics for hybrid pixel detectors – TWEPP-09

Future hybrid pixel detectors are asking for smaller pixels in order to improve spatial resolution and to deal with an increasing counting rate. Facing these requirements is foreseen to be done by microelectronics technology shrinking. However, this straightforward approach presents some disadvantages in term of performances and cost. New 3D technologies offer an alternative way with the advantage of technology mixing. For the upgrade of ATLAS pixel detector, a 3D conception of the read-out chip appeared as an interesting solution. Splitting the pixel functionalities into two separate levels will reduce pixel size and open the opportunity to take benefit of technology's mixing. Based on a previous prototype of the read-out chip FE-I4 (IBM 130nm), this paper presents the design of a hybrid pixel read-out chip using threedimensional Tezzaron-Chartered technology. In order to disentangle effects due to Chartered 130nm technology from effects involved by 3D architecture, a first translation of FEI4 prototype had been designed at the beginning of this year in Chartered 2D technology, and first test results will be presented in the last part of this paper

HV/HR-CMOS sensors for the ATLAS upgrade—concepts and test chip results

In order to extend its discovery potential, the Large Hadron Collider (LHC) will have a major upgrade (Phase II Upgrade) scheduled for 2022. The LHC after the upgrade, called High-Luminosity LHC (HL-LHC), will operate at a nominal leveled instantaneous luminosity of 5× 1034 cm−2 s−1, more than twice the expected Phase I . The new Inner Tracker needs to cope with this extremely high luminosity. Therefore it requires higher granularity, reduced material budget and increased radiation hardness of all components. A new pixel detector based on High Voltage CMOS (HVCMOS) technology targeting the upgraded ATLAS pixel detector is under study. The main advantages of the HVCMOS technology are its potential for low material budget, use of possible cheaper interconnection technologies, reduced pixel size and lower cost with respect to traditional hybrid pixel detector. Several first prototypes were produced and characterized within ATLAS upgrade R&D effort, to explore the performance and radiation hardness of this technology. In this paper, an overview of the HVCMOS sensor concepts is given. Laboratory tests and irradiation tests of two technologies, HVCMOS AMS and HVCMOS GF, are also given

Radiation-hard active pixel sensors for HL-LHC detector upgrades based on HV-CMOS technology

Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region. A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself. The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation at room temperature. A traditional readout chip is still needed to receive and organize the data from the active sensor and to handle high-level functionality such as trigger management. HV-CMOS has been designed to be compatible with both pixel and strip readout. In this paper an overview of HV2FEI4, a HV-CMOS prototype in 180 nm AMS technology, will be given. Preliminary results after neutron and X-ray irradiation are shown

XPAD: A Photons Counting Pixel Detector for Material Sciences and Small Animal imaging

A paraître dans NIMInternational audienceExperiments on high flux and high brilliance 3rd generation synchrotron X-ray sources are now limited by detector performance. Photon counting hybrid pixel detectors are being investigated as a solution to improve the dynamic range and the readout speed of the available 2D detectors. The XPAD2 is a large surface hybrid pixel detector (68 x 65 mm$^2$) with a dynamic response which ranges from 0.01 photons/pixel/s up to 10$^6$ photons/pixel/s. High resolution data have been recorded using the XPAD2. The comparison with data measured using a conventional setup shows a gain on measurement duration by a factor 20 and on dynamic range. A new generation of pixel detector (XPAD3) is presently under development. For this, a new electronic chip (the XPAD3) has been designed to improve spatial resolution by using 130 $\mu$m pixels and detector efficiency by using CdTe sensors. XPAD2 is also operated with PIXSCAN, a CT-scanner for mice